RZA Flexible Software Package Documentation  Release v1.1.0

 
I/O Port Interface

Detailed Description

Interface for accessing I/O ports and configuring I/O functionality.

Summary

The IOPort shared interface provides the ability to access the IOPorts of a device at both bit and port level. Port and pin direction can be changed.

IOPORT Interface description: I/O Ports (r_ioport)

Data Structures

struct  ioport_pin_cfg_t
 
struct  ioport_cfg_t
 
struct  ioport_api_t
 
struct  ioport_instance_t
 

Typedefs

typedef uint16_t ioport_size_t
 IO port size on this device. More...
 
typedef void ioport_ctrl_t
 

Enumerations

enum  ioport_peripheral_t
 
enum  ioport_sd_channel_t
 
enum  ioport_qspi_channel_t
 
enum  ioport_ethernet_channel_t
 
enum  ioport_sd_voltage_t
 
enum  ioport_qspi_voltage_t
 
enum  ioport_ethernet_voltage_t
 
enum  ioport_ethernet_mode_t
 
enum  ioport_cfg_options_t
 
enum  ioport_pwpr_t
 

Data Structure Documentation

◆ ioport_pin_cfg_t

struct ioport_pin_cfg_t

Pin identifier and Pin Function Setting (PFS) value

Data Fields
uint32_t pin_cfg Pin PFS configuration - Use ioport_cfg_options_t parameters to configure.
bsp_io_port_pin_t pin Pin identifier.

◆ ioport_cfg_t

struct ioport_cfg_t

Multiple pin configuration data for loading into each GPIO register by R_IOPORT_Init()

Data Fields
uint16_t number_of_pins Number of pins for which there is configuration data.
ioport_pin_cfg_t const * p_pin_cfg_data Pin configuration data.

◆ ioport_api_t

struct ioport_api_t

IOPort driver structure. IOPort functions implemented at the HAL layer will follow this API.

Data Fields

fsp_err_t(* open )(ioport_ctrl_t *const p_ctrl, const ioport_cfg_t *p_cfg)
 
fsp_err_t(* close )(ioport_ctrl_t *const p_ctrl)
 
fsp_err_t(* pinsCfg )(ioport_ctrl_t *const p_ctrl, const ioport_cfg_t *p_cfg)
 
fsp_err_t(* pinCfg )(ioport_ctrl_t *const p_ctrl, bsp_io_port_pin_t pin, uint32_t cfg)
 
fsp_err_t(* pinEventInputRead )(ioport_ctrl_t *const p_ctrl, bsp_io_port_pin_t pin, bsp_io_level_t *p_pin_event)
 
fsp_err_t(* pinEventOutputWrite )(ioport_ctrl_t *const p_ctrl, bsp_io_port_pin_t pin, bsp_io_level_t pin_value)
 
fsp_err_t(* pinSDVoltageModeCfg )(ioport_ctrl_t *const p_ctrl, ioport_sd_channel_t channel, ioport_sd_voltage_t voltage)
 
fsp_err_t(* pinQSPIVoltageModeCfg )(ioport_ctrl_t *const p_ctrl, ioport_qspi_channel_t channel, ioport_qspi_voltage_t voltage)
 
fsp_err_t(* pinEthernetVoltageModeCfg )(ioport_ctrl_t *const p_ctrl, ioport_ethernet_channel_t channel, ioport_ethernet_voltage_t voltage)
 
fsp_err_t(* pinRead )(ioport_ctrl_t *const p_ctrl, bsp_io_port_pin_t pin, bsp_io_level_t *p_pin_value)
 
fsp_err_t(* pinWrite )(ioport_ctrl_t *const p_ctrl, bsp_io_port_pin_t pin, bsp_io_level_t level)
 
fsp_err_t(* portDirectionSet )(ioport_ctrl_t *const p_ctrl, bsp_io_port_t port, ioport_size_t direction_values, ioport_size_t mask)
 
fsp_err_t(* portEventInputRead )(ioport_ctrl_t *const p_ctrl, bsp_io_port_t port, ioport_size_t *p_event_data)
 
fsp_err_t(* portEventOutputWrite )(ioport_ctrl_t *const p_ctrl, bsp_io_port_t port, ioport_size_t event_data, ioport_size_t mask_value)
 
fsp_err_t(* portRead )(ioport_ctrl_t *const p_ctrl, bsp_io_port_t port, ioport_size_t *p_port_value)
 
fsp_err_t(* portWrite )(ioport_ctrl_t *const p_ctrl, bsp_io_port_t port, ioport_size_t value, ioport_size_t mask)
 

Field Documentation

◆ open

fsp_err_t(* ioport_api_t::open) (ioport_ctrl_t *const p_ctrl, const ioport_cfg_t *p_cfg)

Initialize internal driver data and initial pin configurations. Called during startup. Do not call this API during runtime. Use ioport_api_t::pinsCfg for runtime reconfiguration of multiple pins.

Implemented as
Parameters
[in]p_cfgPointer to pin configuration data array.

◆ close

fsp_err_t(* ioport_api_t::close) (ioport_ctrl_t *const p_ctrl)

Close the API.

Implemented as
Parameters
[in]p_ctrlPointer to control structure.

◆ pinsCfg

fsp_err_t(* ioport_api_t::pinsCfg) (ioport_ctrl_t *const p_ctrl, const ioport_cfg_t *p_cfg)

Configure multiple pins.

Implemented as
Parameters
[in]p_cfgPointer to pin configuration data array.

◆ pinCfg

fsp_err_t(* ioport_api_t::pinCfg) (ioport_ctrl_t *const p_ctrl, bsp_io_port_pin_t pin, uint32_t cfg)

Configure settings for an individual pin.

Implemented as
Parameters
[in]pinPin to be read.
[in]cfgConfiguration options for the pin.

◆ pinEventInputRead

fsp_err_t(* ioport_api_t::pinEventInputRead) (ioport_ctrl_t *const p_ctrl, bsp_io_port_pin_t pin, bsp_io_level_t *p_pin_event)

Read the event input data of the specified pin and return the level.

Implemented as
Parameters
[in]pinPin to be read.
[in]p_pin_eventPointer to return the event data.

◆ pinEventOutputWrite

fsp_err_t(* ioport_api_t::pinEventOutputWrite) (ioport_ctrl_t *const p_ctrl, bsp_io_port_pin_t pin, bsp_io_level_t pin_value)

Write pin event data.

Implemented as
Parameters
[in]pinPin event data is to be written to.
[in]pin_valueLevel to be written to pin output event.

◆ pinSDVoltageModeCfg

fsp_err_t(* ioport_api_t::pinSDVoltageModeCfg) (ioport_ctrl_t *const p_ctrl, ioport_sd_channel_t channel, ioport_sd_voltage_t voltage)

Configure the SD voltage of the SD channels.

Implemented as
Parameters
[in]channelChannel configuration will be set for.
[in]voltageVoltage to set the channel to.

◆ pinQSPIVoltageModeCfg

fsp_err_t(* ioport_api_t::pinQSPIVoltageModeCfg) (ioport_ctrl_t *const p_ctrl, ioport_qspi_channel_t channel, ioport_qspi_voltage_t voltage)

Configure the QSPI voltage of the QSPI channels.

Implemented as
Parameters
[in]channelChannel configuration will be set for.
[in]voltageVoltage to set the channel to.

◆ pinEthernetVoltageModeCfg

fsp_err_t(* ioport_api_t::pinEthernetVoltageModeCfg) (ioport_ctrl_t *const p_ctrl, ioport_ethernet_channel_t channel, ioport_ethernet_voltage_t voltage)

Configure the Ethernet voltage of the Ethernet channels.

Implemented as
Parameters
[in]channelChannel configuration will be set for.
[in]voltageVoltage to set the channel to.

◆ pinRead

fsp_err_t(* ioport_api_t::pinRead) (ioport_ctrl_t *const p_ctrl, bsp_io_port_pin_t pin, bsp_io_level_t *p_pin_value)

Read level of a pin.

Implemented as
Parameters
[in]pinPin to be read.
[in]p_pin_valuePointer to return the pin level.

◆ pinWrite

fsp_err_t(* ioport_api_t::pinWrite) (ioport_ctrl_t *const p_ctrl, bsp_io_port_pin_t pin, bsp_io_level_t level)

Write specified level to a pin.

Implemented as
Parameters
[in]pinPin to be written to.
[in]levelState to be written to the pin.

◆ portDirectionSet

fsp_err_t(* ioport_api_t::portDirectionSet) (ioport_ctrl_t *const p_ctrl, bsp_io_port_t port, ioport_size_t direction_values, ioport_size_t mask)

Set the direction of one or more pins on a port.

Implemented as
Parameters
[in]portPort being configured.
[in]direction_valuesValue controlling direction of pins on port (3 - output (input enable), 2 - output (input disable), 1 input, 0 - Hi-Z).
[in]maskMask controlling which pins on the port are to be configured.

◆ portEventInputRead

fsp_err_t(* ioport_api_t::portEventInputRead) (ioport_ctrl_t *const p_ctrl, bsp_io_port_t port, ioport_size_t *p_event_data)

Read captured event data for a port.

Implemented as
Parameters
[in]portPort to be read.
[in]p_event_dataPointer to return the event data.

◆ portEventOutputWrite

fsp_err_t(* ioport_api_t::portEventOutputWrite) (ioport_ctrl_t *const p_ctrl, bsp_io_port_t port, ioport_size_t event_data, ioport_size_t mask_value)

Write event output data for a port.

Implemented as
Parameters
[in]portPort event data will be written to.
[in]event_dataData to be written as event data to specified port.
[in]mask_valueEach bit set to 1 in the mask corresponds to that bit's value in event data. being written to port.

◆ portRead

fsp_err_t(* ioport_api_t::portRead) (ioport_ctrl_t *const p_ctrl, bsp_io_port_t port, ioport_size_t *p_port_value)

Read states of pins on the specified port.

Implemented as
Parameters
[in]portPort to be read.
[in]p_port_valuePointer to return the port value.

◆ portWrite

fsp_err_t(* ioport_api_t::portWrite) (ioport_ctrl_t *const p_ctrl, bsp_io_port_t port, ioport_size_t value, ioport_size_t mask)

Write to multiple pins on a port.

Implemented as
Parameters
[in]portPort to be written to.
[in]valueValue to be written to the port.
[in]maskMask controlling which pins on the port are written to.

◆ ioport_instance_t

struct ioport_instance_t

This structure encompasses everything that is needed to use an instance of this interface.

Data Fields
ioport_ctrl_t * p_ctrl Pointer to the control structure for this instance.
ioport_cfg_t const * p_cfg Pointer to the configuration structure for this instance.
ioport_api_t const * p_api Pointer to the API structure for this instance.

Typedef Documentation

◆ ioport_size_t

typedef uint16_t ioport_size_t

IO port size on this device.

IO port type used with ports

◆ ioport_ctrl_t

typedef void ioport_ctrl_t

IOPORT control block. Allocate an instance specific control block to pass into the IOPORT API calls.

Implemented as

Enumeration Type Documentation

◆ ioport_peripheral_t

Superset of all peripheral functions.

Enumerator
IOPORT_PERIPHERAL_MODE0 

Pin will function as a Mode0 peripheral pin

IOPORT_PERIPHERAL_MODE1 

Pin will function as a Mode1 peripheral pin

IOPORT_PERIPHERAL_MODE2 

Pin will function as a Mode2 peripheral pin

IOPORT_PERIPHERAL_MODE3 

Pin will function as a Mode3 peripheral pin

IOPORT_PERIPHERAL_MODE4 

Pin will function as a Mode4 peripheral pin

IOPORT_PERIPHERAL_MODE5 

Pin will function as a Mode5 peripheral pin

IOPORT_PERIPHERAL_MODE6 

Pin will function as a Mode6 peripheral pin

IOPORT_PERIPHERAL_MODE7 

Pin will function as a Mode7 peripheral pin

IOPORT_PERIPHERAL_END 

Marks end of enum - used by parameter checking

◆ ioport_sd_channel_t

Superset of SD channels.

Enumerator
IOPORT_SD_CHANNEL_0 

Used to select SD channel 0.

IOPORT_SD_CHANNEL_1 

Used to select SD channel 1.

IOPORT_SD_CHANNEL_END 

Marks end of enum - used by parameter checking.

◆ ioport_qspi_channel_t

Superset of QSPI channels.

Enumerator
IOPORT_QSPI_CHANNEL_0 

Used to select QSPI channel 0.

IOPORT_QSPI_CHANNEL_1 

Used to select QSPI channel 1.

IOPORT_QSPI_CHANNEL_END 

Marks end of enum - used by parameter checking.

◆ ioport_ethernet_channel_t

Enumerator
IOPORT_ETHERNET_CHANNEL_0 

Used to select Ethernet channel 0.

IOPORT_ETHERNET_CHANNEL_1 

Used to select Ethernet channel 1.

IOPORT_ETHERNET_CHANNEL_END 

Marks end of enum - used by parameter checking.

◆ ioport_sd_voltage_t

Superset of SD voltages.

Enumerator
IOPORT_SD_VOLTAGE_33 

SD voltage set to 3.3V.

IOPORT_SD_VOLTAGE_18 

SD voltage set to 1.8V.

IOPORT_SD_VOLTAGE_END 

Marks end of enum - used by parameter checking.

◆ ioport_qspi_voltage_t

Superset of QSPI voltages.

Enumerator
IOPORT_QSPI_VOLTAGE_33 

QSPI voltage set to 3.3V.

IOPORT_QSPI_VOLTAGE_18 

QSPI voltage set to 1.8V.

IOPORT_QSPI_VOLTAGE_END 

Marks end of enum - used by parameter checking.

◆ ioport_ethernet_voltage_t

Superset of Ethernet voltages.

Enumerator
IOPORT_ETHERNET_VOLTAGE_33 

Ethernet voltage set to 3.3V.

IOPORT_ETHERNET_VOLTAGE_18 

Ethernet voltage set to 1.8V.

IOPORT_ETHERNET_VOLTAGE_25 

Ethernet voltage set to 2.5V.

IOPORT_ETHERNET_VOLTAGE_END 

Marks end of enum - used by parameter checking.

◆ ioport_ethernet_mode_t

Enumerator
IOPORT_ETHERNET_MODE_RMII 

Ethernet PHY mode set to MII.

IOPORT_ETHERNET_MODE_MII 

Ethernet PHY mode set to RMII.

IOPORT_ETHERNET_MODE_END 

Marks end of enum - used by parameter checking.

◆ ioport_cfg_options_t

Options to configure pin functions

Enumerator
IOPORT_CFG_PORT_DIRECTION_HIZ 

Sets the pin direction to Hi-Z (default)

IOPORT_CFG_PORT_DIRECTION_INPUT 

Sets the pin direction to input.

IOPORT_CFG_PORT_DIRECTION_OUTPUT 

Sets the pin direction to output (input disable)

IOPORT_CFG_PORT_DIRECTION_OUTPUT_INPUT 

Sets the pin direction to output (input enable)

IOPORT_CFG_PORT_OUTPUT_LOW 

Sets the pin level to low.

IOPORT_CFG_PORT_OUTPUT_HIGH 

Sets the pin level to high.

IOPORT_CFG_PULLUP_PULLDOWN_DISABLE 

Disable the pin's internal pull-up and pull-down.

IOPORT_CFG_PULLUP_ENABLE 

Enables the pin's internal pull-up.

IOPORT_CFG_PULLDOWN_ENABLE 

Enables the pin's internal pull-down.

IOPORT_CFG_DRIVE_B00 

Sets the IOLH register value to b'00.

IOPORT_CFG_DRIVE_B01 

Sets the IOLH register value to b'01.

IOPORT_CFG_DRIVE_B10 

Sets the IOLH register value to b'10.

IOPORT_CFG_DRIVE_B11 

Sets the IOLH register value to b'11.

IOPORT_CFG_TINT_DISABLE 

Disable IRQ functionality for a pin.

IOPORT_CFG_TINT_ENABLE 

Sets pin as an IRQ pin.

IOPORT_CFG_SLEW_RATE_SLOW 

Sets the pin slew-rate to slow.

IOPORT_CFG_SLEW_RATE_FLAT 

Sets the pin slew-rate to flat.

IOPORT_CFG_SPECIAL_PURPOSE_PORT_INPUT_DISABLE 

Disable input the pin of special purpose port.

IOPORT_CFG_SPECIAL_PURPOSE_PORT_INPUT_ENABLE 

Sets the pin of special purpose port to input.

IOPORT_CFG_NOISE_FILTER_OFF 

Noise filter disable.

IOPORT_CFG_NOISE_FILTER_ON 

Noise filter enable.

IOPORT_CFG_NOISE_FILTER_NUM_4STAGE 

Sets the pin noise filter to 4-stage filter.

IOPORT_CFG_NOISE_FILTER_NUM_8STAGE 

Sets the pin noise filter to 8-stage filter.

IOPORT_CFG_NOISE_FILTER_NUM_12STAGE 

Sets the pin noise filter to 12-stage filter.

IOPORT_CFG_NOISE_FILTER_NUM_16STAGE 

Sets the pin noise filter to 16-stage filter.

IOPORT_CFG_NOISE_FILTER_NOT_DIVIDED 

Noise filter not divided.

IOPORT_CFG_NOISE_FILTER_DIVIDED_9000 

Noise filter divided by 9000.

IOPORT_CFG_NOISE_FILTER_DIVIDED_18000 

Noise filter divided by 18000.

IOPORT_CFG_NOISE_FILTER_DIVIDED_36000 

Noise filter divided by 36000.

IOPORT_CFG_PERIPHERAL_PIN 

Enables pin to operate as a peripheral pin.

◆ ioport_pwpr_t

PFS writing enable/disable.

Enumerator
IOPORT_PFS_WRITE_DISABLE 

Disable PFS write access.

IOPORT_PFS_WRITE_ENABLE 

Enable PFS write access.